[54] VisualDSP++ 4.5 – User’s Guide, Revision 2.0, April 2006, Analog Devices Part Number 82-
000420-02.
[55] B. Novak, XDS560 Emulation Technology Brings Real-time Debugging Visibility to Next
Generation High-Speed Systems, Texas Instruments Application Report SPRA823A, June 2002.
[56] H. Thampi, J. Govindarajan, DSP/BIOS, RTDX and Host-Target Communications, Texas
Instruments Application report SPRA895, February 2003.
[57] X. Fu, Real-Time Digital Video Transfer Via High-Speed RTDX, Texas Instruments
Application report SPRA398, May 2002.
[58] S. Jung, Y. Paek, The Very Portable Optimizer For Digital Signal Processors, Proceedings of
CASES’01, International Conference on Compilers, Architecture and Synthesis for Embedded
Systems, Compilers and Optimization Session, Atlanta, Georgia, USA, 2001, pp. 84–92.
[59] D. Dahnoun, Linear Assembly, Texas Instruments University Program, Chapter 7, 2004.
[60] Analysis Toolkit v1.3 for Code Composer Studio – User’s Guide, Texas Instruments Literature
Number SPRU623D, April 2005.
[61] V. Wan and P. Lal, Simulating RF3 to Leverage Code Tuning Capabilities, Texas Instruments
Application Report SPRAA73, December 2004.
[62] TMS320C6000 Optimizing Compiler – User’s Guide, Texas Instruments Literature Number
SPRU197L, May 2004.
[63] Analog Devices Team, Fast Floating-Point Arithmetic Emulation on Backfin Processors,
Analog Devices Engineer-to-Engineer Note EE-185, August 2007.
[64] Y-T. Cheng, TMS320C6000 Integer Division, Texas Instruments Application Report SPRA707,
October 2000.
[65] V. Wan and E. Young, Power Management in an RF5 Audio Streaming Application Using
DSP/BIOS, Texas Instruments Application Report SPRAA19A, August 2005.
[66] D. Menard, D. Chillet and O. Sentieys, Floating-To-Fixed-Point Conversion For Digital Signal
Processors, EURASIP J. Appl. Signal Proc., vol. 2006, Article ID 96421.
[67] F. Culloch, Speeding the Development of Multi-DSP Applications, Embedded Edge, June 2001,
pp. 22–29.
[68] G. Cooper and J. Hunter, Configuring Code Composer Studio For Heterogeneous Debugging,
Texas Instruments Application Report SPRA752, May 2001.
[69] R. F. Hobson, A. R. Dyck, K. L. Cheung and B. Ressi, Signal Processing With Teams Of
Embedded Workhorse Processors, EURASIP J. Embedded Syst., vol. 2006, Article ID 69484.
[70] M. Kokaly-Bannourah, Introduction To TigerSHARC Multiprocessor Systems Using
VisualDSP++, Analog Devices Engineer-to-Engineer Note EE-167, April 2003.
[71] M. Kokaly-Bannourah, Using The Expert Linker For Multiprocessor LDFs, Analog Devices
Engineer-to-Engineer Note EE-202, May 2005.
[72] ADSP-TS101 TigerSHARC Processor – Hardware Reference, Revision 1.1, May 2004, Analog
Devices Part Number 82-001996-01.
[73] TMS320C64x DSP Turbo-Decoder Coprocessor (TCP) – Reference Guide, Texas Instruments
Literature Number SPRU534A, November 2003.
[74] TMS320C64x DSP Viterbi-Decoder Coprocessor (VCP) – Reference Guide, Texas Instruments
Literature Number SPRU533C, November 2003.
[75] P. Cohrs, W. Powell and E. Williams, Creating a Dual-Processor Architectures for Digital
Audio, Embedded Edge, June 2002, pp. 14–19.
[76] P.E. Dodd and W.L. Massegill, Basic Mechanism of Single-Event Upset in Digital
Microelectronics, IEEE Trans. Nucl. Sci., vol. 50, No. 3, June 2003, pp. 583–602.